JOURNAL ARTICLE

A 180nm CMOS image sensor with on-chip optoelectronic image compression

Abstract

We demonstrate an image sensor which directly acquires images in a compressed format. The sensor uses diffractive optical structures integrated in the CMOS back-end layer stack to compute a low-order 2D spatial Gabor transform on visual scenes. As this computation occurs in the optical domain, the readout back-end uses the transform outputs to implement the subsequent image digitization and compression simultaneously. Implemented in a 180nm logic CMOS process, the image sensor uses a 384×384 array of complementary angle-sensitive pixel pairs, consumes 2mW at a frame rate of 15fps, and achieves a 10:1 compression ratio on test images.

Keywords:
Image sensor Computer science Pixel Artificial intelligence Computer vision Frame rate Image compression CMOS Chip Data compression Computer hardware Electronic engineering Image (mathematics) Image processing Engineering Telecommunications

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Citation History

Topics

CCD and CMOS Imaging Sensors
Physical Sciences →  Engineering →  Electrical and Electronic Engineering
Image Processing Techniques and Applications
Physical Sciences →  Engineering →  Media Technology
Advanced Fluorescence Microscopy Techniques
Life Sciences →  Biochemistry, Genetics and Molecular Biology →  Biophysics
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