Goals and tradeoffs in the design of the MC68881 floating point coprocessor

Joel Boney

doi:10.1145/1499310.1499325

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Goals and tradeoffs in the design of the MC68881 floating point coprocessor

Joel Boney

Year: 1984 Journal: AFIPS conference proceedings Pages: 107-107 Publisher: Association for Computing Machinery

DOI: 10.1145/1499310.1499325

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Abstract

This paper describes the goals and tradeoffs in the design of the MC68881 Floating Point Coprocessor. The Motorola MC68881 is a complete implementation of the proposed IEEE floating point standard on a single VLSI chip. It is a coprocessor for the MC68020 microprocessor and is a peripheral processor for other M68000 family processors.

Keywords:

Coprocessor Microprocessor Computer science Floating point Very-large-scale integration Embedded system Point (geometry) Floating-point unit System on a chip Double-precision floating-point format Computer architecture Computer hardware Parallel computing Operating system

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Goals and tradeoffs in the design of the MC68881 floating point coprocessor

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