JOURNAL ARTICLE

Energy-Efficient Adaptive Pipelined MPSoCs for Multimedia Applications

Haris JavaidMuhammad ShafiqueJörg HenkelSri Parameswaran

Year: 2014 Journal:   IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Vol: 33 (5)Pages: 663-676   Publisher: Institute of Electrical and Electronics Engineers

Abstract

Pipelined MPSoCs provide a high throughput implementation platform for multimedia applications. They are typically balanced at design-time considering worst-case scenarios so that a given throughput can be fulfilled at all times. Such worst-case pipelined MPSoCs lack runtime adaptability and result in inefficient resource utilization and high power/energy consumption under a dynamic workload. In this paper, we propose a novel adaptive architecture and a distributed runtime processor manager to enable runtime adaptation in pipelined MPSoCs. The proposed architecture consists of main processors and auxiliary processors, where a main processor uses differing number of auxiliary processors considering runtime workload variations. The runtime processor manager uses a combination of application's execution and knowledge, and offline profiling and statistical information to proactively predict the auxiliary processors that should be used by a main processor. The idle auxiliary processors are then deactivated using clock- or power-gating. Each main processor with a pool of auxiliary processors has its own runtime manager, which is independent of the other main processors, enabling a distributed runtime manager. Our experiments with an H.264 video encoder for HD720p resolution at 30 frames/s show that the adaptive pipelined MPSoC consumed up to 29% less energy (computed using processors and caches) than a worst-case pipelined MPSoC, while delivering a minimum of 28.75 frames/s. Our results show that adaptive pipelined MPSoCs can emerge as an energy-efficient implementation platform for advanced multimedia applications.

Keywords:
Computer science MPSoC Encoder Embedded system Energy consumption Idle Throughput Workload Computer architecture Parallel computing System on a chip Operating system

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13
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1.94
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43
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0.88
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Citation History

Topics

Parallel Computing and Optimization Techniques
Physical Sciences →  Computer Science →  Hardware and Architecture
Embedded Systems Design Techniques
Physical Sciences →  Computer Science →  Hardware and Architecture
Interconnection Networks and Systems
Physical Sciences →  Computer Science →  Computer Networks and Communications
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