JOURNAL ARTICLE

Techniques for verifying superscalar microprocessors

Abstract

Article Free Access Share on Techniques for verifying superscalar microprocessors Author: Jerry R. Burch Cadence Berkeley Laboratories Cadence Berkeley LaboratoriesView Profile Authors Info & Claims DAC '96: Proceedings of the 33rd annual Design Automation ConferenceJune 1996Pages 552–557https://doi.org/10.1145/240518.240623Published:01 June 1996Publication History 81citation351DownloadsMetricsTotal Citations81Total Downloads351Last 12 Months22Last 6 weeks2 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF

Keywords:
Superscalar Computer science Parallel computing Computer architecture

Metrics

106
Cited By
9.57
FWCI (Field Weighted Citation Impact)
13
Refs
0.98
Citation Normalized Percentile
Is in top 1%
Is in top 10%

Citation History

Topics

VLSI and Analog Circuit Testing
Physical Sciences →  Computer Science →  Hardware and Architecture
Embedded Systems Design Techniques
Physical Sciences →  Computer Science →  Hardware and Architecture
Physical Unclonable Functions (PUFs) and Hardware Security
Physical Sciences →  Computer Science →  Hardware and Architecture

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