JOURNAL ARTICLE

Design and Implementation of Reconfigurable Encryption and Decryption System Based on SOPC

Qing ZhouQian HuangYing YuanJun Yang

Year: 2013 Journal:   Applied Mechanics and Materials Vol: 347-350 Pages: 2979-2982   Publisher: Trans Tech Publications

Abstract

The system is based on DES/3DES, AES cipher algorithm as the research object.According to the characteristics of the algorithm, designs a configuration mode which can share resource in space and configurate algorithm in time. Then it uses hardware description language Verilog HDL to realize and optimize the design, and completes a custom reconfigurable DES/3DES/AES encryption/decryption IP core. By SOPC technology, the IP core, Nios II processor, network controller and other function. The design hardware structureis simple, flexibility, security, which can be widely used in the field of informationsecurity.

Keywords:
Embedded system Encryption Verilog Field-programmable gate array Nios II Flexibility (engineering) Advanced Encryption Standard Computer science Computer hardware Engineering Operating system

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Topics

Embedded Systems and FPGA Design
Physical Sciences →  Engineering →  Control and Systems Engineering

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