This paper describes the hardware implementation of a text to Braille Translator using Field-Programmable Gate Arrays (FPGAs). Different from most commercial software-based translators, thecircuit presented is able to carry out text-to-Braille translation in hardware. The translator is based on the translating algorithm, proposed by Paul Blenkhorn [1]. The Very high speed Hardware Description Language (VHDL) was used to describe the chip in a hierarchical way. The test results indicate that the hardware-based translator achieves the same results as software-based commercial translators.
Suarez MolinaBarrera PerezJacinto Gomez
Xuan ZhangCésar Ortega-SánchezIain Murray
Falgoon Sen ApuFatema Islam JoytiMd Ala Uddin AnikMd Wasi Uddin ZobayerAtanu Kumar DeySakib Sakhawat
Marius MisaroşDan-Ioan GotaOvidiu StanLiviu Miclea
Ashley E. Bravo-BravoHillary A. MartinezAdriana AbantoJoaquín Martínez-SánchezLizardo K. Torres-Ayala