DPR (Dynamic Partial Reconfiguration) capability found in some of modern FPGAs allows implementation of a concept of a HW (Hardware) task, which similarly to its software counterpart has its state and shares time-multiplexed resources with the other tasks. While the new technology presents many advantages for embedded systems where run-time adaptability is an additional requirement, their efficient and easily portable implementations require a control software or an OS which would manage all the complexities of the underlying technology, providing an abstracted interface for the application programmer. This paper presents a novel and robust hardware multitasking extension for a conventional OS, managing task scheduling and configurations, and providing easy-to-use API (Application Programming Interface) for the application programmer. Scheduling is priority-based and takes advantage of task caching. Moreover, the extension is based on a developed design flow and embedded hardware platform allowing efficient task preemption, which can be utilized whenever it presents any benefits to the application.
Krzysztof JozwikShinya HondaMasato EdahiroHiroyuki TomiyamaHiroaki Takada
Krzysztof JozwikHiroyuki TomiyamaMasato EdahiroShinya HondaHiroaki Takada
Aurelio Morales-VillanuevaRohit KumarRoss Gordon
Aurelio Morales-VillanuevaRoss Gordon
George CharitopoulosIosif KoidisKyprianos PapadimitriouDionisios Pnevmatikatos