Efficient and high performance FPGA-based rectification architecture for stereo vision

Paolo Zicari

doi:10.1016/j.micpro.2013.09.007

ScienceGate Book Chapters

JOURNAL ARTICLE

Efficient and high performance FPGA-based rectification architecture for stereo vision

Paolo Zicari

Year: 2013 Journal: Microprocessors and Microsystems Vol: 37 (8)Pages: 1144-1154 Publisher: Elsevier BV

DOI: 10.1016/j.micpro.2013.09.007

Get Full-Text PDF Get Analytical Report

Keywords:

Epipolar geometry Computer science Image rectification Artificial intelligence Computer vision Rectification Field-programmable gate array Stereopsis Fundamental matrix (linear differential equation) Computer stereo vision Computer hardware Image (mathematics) Mathematics

Metrics

Cited By

1.82

FWCI (Field Weighted Citation Impact)

Refs

0.88

Citation Normalized Percentile

Is in top 1%

Is in top 10%

Citation History

Topics

Advanced Vision and Imaging

Physical Sciences → Computer Science → Computer Vision and Pattern Recognition

Optical measurement and interference techniques

Physical Sciences → Computer Science → Computer Vision and Pattern Recognition

CCD and CMOS Imaging Sensors

Physical Sciences → Engineering → Electrical and Electronic Engineering

Efficient and high performance FPGA-based rectification architecture for stereo vision

Metrics

Citation History

Topics

Related Documents

High Performance Implementation of Stereo Vision Matching Based on FPGA

FPGA-based lens undistortion and image rectification for stereo vision applications

FPGA-based rectification of stereo images

Computationally efficient implementation of video rectification in an FPGA for stereo vision applications

High-Performance VLSI Architecture for Stereo Vision