Architecture of embedded zerotree wavelet based real-time video coder

Abstract

A VLSI architecture of a real-time wavelet video coder is described, with the main focus put on the efficient VLSI implementation and scalable code generation. To achieve this goal, this architecture devises a modified 2-D sub-band decomposition scheme in conjunction with a parallelized block-based EZW (Embedded Zerotree Wavelet) coding. Experimental results are also shown in comparison with MPEG2 so as to demonstrate the viability of the proposed architecture.