OC-192 receiver in standard 0.18μm CMOS

Jun Cao; Afshin Momtaz; K. Vakilian; M. Green; Doyoung Chung; Keh-Chee Jen; M. Caresosa; Benjamin Yue Hao Tan; Ichiro Fujimori; A. Hairapetian

doi:10.1109/isscc.2002.992213

JOURNAL ARTICLE

OC-192 receiver in standard 0.18μm CMOS

Jun Cao Afshin Momtaz K. Vakilian M. Green Doyoung Chung Keh-Chee Jen M. Caresosa Benjamin Yue Hao Tan Ichiro Fujimori A. Hairapetian

Year: 2005 Journal: 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) Vol: 2 Pages: 200-471

DOI: 10.1109/isscc.2002.992213

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Abstract

A fully integrated OC-192 multi-rate (9.95Gb/s-10.71Gb/s) receiver uses standard 0.18/spl mu/m CMOS. The circuit consists of an input amplifier, CDR, 1:16 demux and 18 LVDS drivers. The chip exceeds SONET jitter tolerance spec by >100%. Recovered 10Gb/s clock jitter is <4mUl(rms). The input sensitivity is <50mV with 870mW at 1.8V.

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CMOS Computer science Electrical engineering Engineering

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Advancements in PLL and VCO Technologies

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OC-192 receiver in standard 0.18μm CMOS

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