BOOK-CHAPTER
A VLSI Systolic Array Dedicated to Hopfield Neural Network
Year: 1989 Kluwer international series in engineering and computer science Pages: 255-264 Publisher: Springer Nature
Keywords:
Very-large-scale integration Massively parallel Computer science Artificial neural network Computer architecture Parallel computing Scale (ratio) Wafer-scale integration Artificial intelligence Embedded system
Metrics
27
Cited By
4.38
FWCI (Field Weighted Citation Impact)
3
Refs
0.94
Citation Normalized Percentile
Is in top 1%
Is in top 10%
Citation History
Topics
Neural Networks and Applications
Physical Sciences → Computer Science → Artificial Intelligence
Fuzzy Logic and Control Systems
Physical Sciences → Computer Science → Artificial Intelligence
Neural Networks Stability and Synchronization
Physical Sciences → Computer Science → Computer Networks and Communications
Related Documents
JOURNAL ARTICLE
Systolic array algorithm for the Hopfield neural network guaranteeing convergence
S. EunJohn KimS.R. MaengHee Suk Yoon
Journal: Electronics Letters Year: 1993 Vol: 29 (7)Pages: 609-611
JOURNAL ARTICLE
Systolic array implementation of block based Hopfield neural network for pattern association
Ming–Jung SeowHau NgoVijayan K. Asari
Year: 2003 Pages: 213-214
JOURNAL ARTICLE
A VLSI systolic implementation of the Hopfield and back‐propagation neural algorithms
Salim GhanemiBen Ali Y. Mohamed
Journal: Kybernetes Year: 2001 Vol: 30 (1)Pages: 35-47
JOURNAL ARTICLE
Systolic array architecture for LMS algorithm using Hopfield model network
Year: 2002 Pages: 87-90